Muhammad Farhan Azmine

I am a fourth year PhD student with Computer Engineering major at Virginia Tech. I have more than 5 years of experience in developing complex RTL designs, IP subsystem integration and Verification. My research includes developing energy efficient hardware friendly machine learning algorithms using Python/C++ and designing/optimizing digital chips using SystemVerilog/VHDL that can deploy them for Edge AI applications

CVs

My Curriculum Vitae

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ASIC Design CV

CV focused on ASIC design experience and expertise.

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FPGA Design CV

CV focused on FPGA design and implementation expertise.

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ASIC Design Verification CV

CV focused on ASIC design verification and validation expertise.

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ASIC CPU Design CV

CV focused on CPU design and architectural expertise.

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AI/ML Chip/Accelerator Design

CV focused on AI/ML Hardware Accelerator (Inference Chip or On-chip learning)

AI/ML CV

CV focused on AI and machine learning research and expertise.