Hello there, I’m Farhan !

RTL Schematic of a complete SNN-AI accelerator

🎓 I’m a Third-year PhD student at Virginia Tech.

⚡ My research focuses on hardware-efficient ML algorithm design and RTL development, optimization, and verification for energy-efficient neuromorphic accelerators targeting FPGA/ASIC implementations.

🧠 I thrive at the intersection of mathematical logic, digital systems, and architectural innovation—translating complex algorithms into high-performance, silicon-ready designs.

🛠️ I excel at breaking down complex hardware architectures into modular tasks, coordinating with team members, and integrating their contributions into efficient, unified RTL systems.

🎯 Solving complex problems, learning every day, and growing alongside others—it’s not just my work, it’s how I grow.

💬 “Programs must be written with the idea that they will be read by people, and only incidentally for machines to execute.” — Harold Abelson